| Rule Violations |
Count |
| Clearance Constraint (Gap=20mil) ((OnLayer('Keep-Out Layer'))),(InPoly) |
0 |
| Clearance Constraint (Gap=20mil) (InDifferentialPairClass('95OHM_DIFF')),(InPoly) |
0 |
| Clearance Constraint (Gap=8mil) (All),(inPoly) |
0 |
| Clearance Constraint (Gap=6mil) (All),(All) |
16 |
| Clearance Constraint (Gap=25mil) (InNetClass('50OHM_SE')),(InPoly) |
0 |
| Short-Circuit Constraint (Allowed=No) (All),(All) |
0 |
| Un-Routed Net Constraint ( (All) ) |
0 |
| Width Constraint (Min=4mil) (Max=7mil) (Preferred=6.5mil) (InNetClass('75_Ohm')) |
0 |
| Width Constraint (Min=1mil) (Max=15.35mil) (Preferred=1mil) (InNetClass('50OHM_SE')) |
0 |
| Width Constraint (Min=4mil) (Max=125mil) (Preferred=8mil) (All) |
0 |
| Routing Layers(All) |
0 |
| Routing Via (MinHoleWidth=6mil) (MaxHoleWidth=28mil) (PreferredHoleWidth=10mil) (MinWidth=12mil) (MaxWidth=50mil) (PreferedWidth=22mil) (All) |
0 |
| Differential Pairs Uncoupled Length using the Gap Constraints (Min=1mil) (Max=6mil) (Prefered=6mil) and Width Constraints (Min=1mil) (Max=8.75mil) (Prefered=5.5mil) (InDifferentialPairClass('95OHM_DIFF')) |
0 |
| Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (IsVia) |
0 |
| Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) |
0 |
| Minimum Annular Ring (Minimum=2.9mil) (All) |
0 |
| Hole Size Constraint (Min=1mil) (Max=221mil) (All) |
0 |
| Pads and Vias to follow the Drill pairs settings |
0 |
| Hole To Hole Clearance (Gap=10mil) (All),(All) |
0 |
| Minimum Solder Mask Sliver (Gap=0.085mil) (All),(All) |
0 |
| Silk To Solder Mask (Clearance=0.1mil) (IsPad),(All) |
0 |
| Silk to Silk (Clearance=2mil) (All),(All) |
0 |
| Net Antennae (Tolerance=0mil) (All) |
4 |
| Length Constraint (Min=1880mil) (Max=2280mil) (InNetClass('SD1_BUS')) |
2 |
| Matched Lengths(Tolerance=50mil) (InxSignalClass('xSignals_PMODB')) |
0 |
| Matched Lengths(Tolerance=50mil) (InNetClass('ETH_BUS')) |
0 |
| Matched Lengths(Tolerance=100mil) (InxSignalClass('DisplayPort_xSig')) |
0 |
| Matched Lengths(Tolerance=2.5mil) (InNetClass('USB3_BUS')) |
0 |
| Matched Lengths(Tolerance=5mil) (InDifferentialPairClass('95OHM_DIFF')) |
13 |
| Matched Lengths(Tolerance=250mil) (InNetClass('JTAG_BUS')) |
0 |
| Matched Lengths(Tolerance=5mil) (InNetClass('SATA_BUS')) |
0 |
| Matched Lengths(Tolerance=50mil) (InxSignalClass('xSignals_PMODA')) |
0 |
| Component Clearance Constraint ( Horizontal Gap = 10mil, Vertical Gap = -200mil ) (All),(All) |
0 |
| Total |
35 |
